#
#  Makefile.inc
#  (C) Copyright 2017
#  John Ryland
#
# Description:
#   Simple boilerplate of a makefile where what
#   you need to provide is TARGET, SOURCES and FLAGS
#   Header file dependancies are automatically calculated
#   I have a more complex version of this which handles
#   sub-directories and sub-projects, but this is the very
#   simple version which is reasonably self-explainetary.
#
# Example usage:
#   TARGET = MyApp
#   SOURCE = myapp.cpp classA.cpp classB.cpp
#   FLAGS = -I.
#   -include Makefile.inc
#

OBJECTS      = $(patsubst %.cpp, build/.objs/%.o, $(SOURCES))
DEPENDS      = $(patsubst build/.objs/%.o, build/.deps/%.cpp.d, $(OBJECTS))
PLATFORM     = $(shell uname -s)
ARCH         = $(shell uname -m)
COMPILER     = $(shell c++ --version | tr [a-z] [A-Z] | grep -o 'CLANG\|GCC' | head -n 1)
COMPILER_VER = $(shell c++ --version | grep -o "[0-9]\.[0-9]" | head -n 1)

all: build/$(TARGET) $(ADDITIONAL_DEPS)

clean:
		rm -rf build

build/.deps/%.cpp.d: %.cpp
		@mkdir -p `dirname $@`
		c++ $(CFLAGS) -MT $(patsubst %.cpp, build/.objs/%.o, $<) -MD -E $< -MF $@ > /dev/null

build/.objs/%.o: %.cpp build/.deps/%.cpp.d
		@mkdir -p `dirname $@`
		c++ $(CFLAGS) -c $< -o $@

build/$(TARGET): $(OBJECTS) $(DEPENDS)
		c++ $(LFLAGS) $(OBJECTS) -o $@
		# strip -S $@

.PHONY: all clean

-include $(DEPENDS)

debug:
		@echo "PLATFORM    = $(PLATFORM)"
		@echo "ARCH        = $(ARCH)"
		@echo "COMPILER    = $(COMPILER)"
		@echo "VERSION     = $(COMPILER_VER)"